In complex logic switching mechanisms such as those used in integrated circuits, for example, the current drawn is subject to severe fluctuations. The reason for this is, inter alia, that in phases when the logic switching mechanism is inactive the clock signal is supplied only to such parts of the logic switching mechanism as are necessary for subsequently reactivating the operation of the logic switching mechanism. In the reactivation phase, the current drawn by the logic switching mechanism rises greatly within a few clock periods.
Such a rise in current causes a supply voltage drop in the entire logic switching mechanism through the inductive and resistive coating of the electrical power supply on a component which comprises the logic switching mechanism, in the housing of the component, on a board which comprises the component, as far as a blocking capacitance on the power supply source.
If the supply voltage drops below a minimum permissible limit value, this may result in incorrect behavior or in operating failure of the logic switching mechanism. In particular, a combinational logic unit in the logic switching mechanism may require a long period of time in order to reach a stable operating state. When the supply voltage has dropped, the subsequent clock signal may transfer incorrect logic values into the logic switching mechanism. These result in an impermissible state of the combinational logic and subsequently in incorrect behavior from the logic switching mechanism. Such incorrect behavior can be terminated only by resetting the logic switching mechanism to an initial state. Operation of the associated component is thus temporarily unavailable.
To avoid a drop in the supply voltage in the course of various operating conditions, it is known practice for the voltage supply to be designed on a redundant basis. This is done using an additional capacitor whose capacitance is designed for the small timescales within an integrated component. This means that an additional area is required on the semiconductor component, which results in increased production costs.
JP2001125690-A has disclosed an apparatus which lowers the clock frequency of a microprocessor in the event of the supply voltage dropping. To this end, a measuring apparatus is provided which detects when the supply voltage drops below a reference value and then terminates supply of the clock signal. The microprocessor is supplied with a further clock signal having a low clock frequency from an internal clock source. As JP07264874-A also provides, this requires the microprocessor to be reset to an initial state. The two apparatuses are used to provide a clock source which outputs a clock signal having different clock frequencies. Such clock sources deliver an inaccurate clock signal during a transient period.
WO 00/26747-A1 describes a method and an apparatus for restricting the power consumption in a microprocessor. The microprocessor's power consumption is observed and a clock frequency and the microprocessor's supply voltage are regulated accordingly, so that the microprocessor's power consumption is below a prescribed limit value. The logic switching mechanism is not prevented from behaving incorrectly. In addition, they have the associated drawback that it is necessary to provide a clock source having a variably adjustable clock frequency.